Embedded IoT

Embedded IoT World 2021 April 28-29 #eiotworld

1- 87.1 B devices; Tensorflow lite without OS in microcontroller, RISC-V, FPGA; TinyML, ; Docker for embedded; CORE-V; eFPGA,

2- Embedded IoT: Devices, Solutions Architect, Security, Safety, Standardization and certification, secured connectivity, end to end security, modern development practices, 3- Safe access of local IoT devices from the internet OAuth 2.0 & OIDC relies on TLS; MQTT,

4- Scale4Edge RISC- V edge computing ecosystem: Virtual prototyping first! Performance, Energy efficiency, low cost, quality, robustness (safety, security, reliability); virtual system prototypes(VSP); E2E AI performance assessment: NN + ML-Compiler + Virtual Hardware Model => KPI based evaluation TC-ResNet; Sparsity extraction, microcoded data path;

• Machine learning on edge devices requires tailored hardware/software solutions

• support and integration of different target architectures: RISC-V; UltraTrail; SpinnEDGE

• deployment software flow based on TVM

• application specific vs domain specific

5 - A structured approach to comprehensive IoT security in the smart home
Network Protocols: BLE, Bluetooth mesh, WiFi, Zigbee, Sub-G, GPRS, 4G/5G, NB-IoT, GNSS

*6 - Code size compiler optimizations and techniques for embedded systems
Code size of embedded application has been a concern for a very long time. While storage becomes cheaper and smaller, developers find creative ways to increase code size by adding features or unnecessary software engineering. Compilers have come a long way in optimizing applications for code size. While most compiler optimization work were focused on application performance, we have seen increase in the code size optimizations in recent years. This session will cover classical as well as recent compiler optimizations for code size, a few of which Aditya has implemented in the LLVM compiler. Some optimizations (hot cold splitting, function entry instrumentation) require collecting data from the field while the application is running. The presentation will provide an overview of how those compiler techniques help reduce code size. We will also explore some tips and techniques (compiler flags to reduce code size, tuning of compiler options like inline threshold), that help reduce binary size. Having knowledge of the code generated by the compiler and the instruction set architecture can help engineers chose appropriate programming abstractions and idioms. Optimize applications for code size using available compiler techniques and software engineering techniques ; Various code-size and performance trade offs ; Understanding the code size requirements embedded application.
code size optimization flags:

• -Os

• -Oz (only in llvm)

• -fno-unroll-loops

• -fno-exceptions

• -fno-rtti

• -fno-jump-tables

• -fno-function-sections/ -ffunction-sections

• -Wl, --strip-all ( or do not pass '-g' flag)

• 
  

*7 - Condition monitoring through machine learning

Data acquisition: acquisition sensor setup; retrieve data over wired/wireless connectivity; label data; store data
condition monitoring: data cleaning/denoising; data visualization; preprocessing and feature extraction; feature engineering
anomaly detection & classification: machine learning of the system behavior; semi-supervised learning at the edge for anomaly detection; supervised learning to classify anomalies
predictive maintenance: model deployment; remaining life prediction models; overall efficiency optimization; operational systems integration

**8 - Optimizing machine learning models for IoT applications
ML/AI in embedded applications is tightly constrained and performance intensive; best-in-class optimization makes it possible; structuring your code effectively can help;

*9 - Edge AI processing in real time
edge sensing with cloud AI: data may be filtered, compressed, or pre-processed at edge
edge AI with cloud data upstream: results send cloud; AI inference at the edge for efficiency, latency, cost, or scale
edge AI real time interactive system: everything on edge
ioFog;

10 - Enabling machine learning on Arm Cortex M0-powered IoT nodes using Qeexo AutoML (qeexo.com)

benefits of ML + IoT = low latency, low bandwidth, low power consumption, high availability, data privacy and security

ml pipeline for IoT: data processing, feature extraction, model training, model conversion, training & conversion,

ensemble methods:

• feature-based, compact representation, easy to reduce model size, model size can be reduced post-training

• bagging is a type of ensemble method where multiple models are trained in parallel on subsampled datasets (reduces error due to variance); many models to combine output to make a single classification; every model get pictures on dataset , over fit, but combine get same accuracy, picture the noise is cancelled for each model.

• boosting is a type of ensemble method where multiple models are trained in sequence to improve upon the errors of the previous model (reduces error due to bias)

11 - Managing ROS2 applications at the edge

ROS 2:

end-to-end application lifecycle

12 - Edge computing: Use cases, requirements, architectures and implementations

heterogeneous processors;

challenges: latency, network bandwidth, trustworthiness (safety, security, resilience, reliability, privacy), scalability, data models/ data ownership, IT/OT disconnect, justifying the cost, ...

Company:

Zephyr Project, QuickLoginc, Antmicro,